Dynamic balancing machines

ABSTRACT

The present circuit arrangement provides a control signal or control signals for an automatic balancing machine, which signals are displayed on the screen of a cathode ray tube preferably in the manner of a plan position indicator. The displayed signal is produced from a balance information signal and a reference information signal supplied to the inputs of a multiplier circuit the outputs of which are connected to a display circuit which in turn is connected to control a cathode ray tube.

United States Patent [1 1 Whitmore DYNAMIC BALANCING MACHINES EnglandFiled:

[ Fm'elgll Applicafifln Priority Dam nal or control signals for anautomatic balancing ma- July 7, 1970 Great Britain 32,856/70 chine,which signals are displayed on the screen of a I cathode ray tubepreferably in the manner of a plan po- [52] US. Cl. 73/465 sitionindicator. The displayed signal is produced from [51] Int. Cl. ....-Glm1/22 a balance information signal and a reference informa- [58] Field ofSearch 73/462, 465 tion signal supplied to the inputs of a multipliercircuit the outputs of which are connected to a display circuit [56]References Cited which in turn is connected to control a cathode rayUNITED STATES PATENTS t 3,336,809 8/1967 Hack Claims, 23 Drawing FiguresJune 29, 1971 Appl. No.: 158,043

Attorney-W. G. Fasse The present circuit arrangement 3,554,061 l/197lHoldinghausen 3,331,252 7/1967 Thomas et al. 3,349,257 10/1967 Thomas etal.

ABSTRACT provides a control sig- /3 1 L 25 I I 'T FILTER L.H, I I3" 25 IELECTRO- I QENJIEERS I N U I l 28 34 I I4 R.H. P.A.M. F'LTER 1 Q R.H. II I 34 1 I4" 1 28 I I ACTUATOR I 2W. sm(w;b I DISPLACEMENT I4 I 24 I uzs|n(w,1+ I C .9 al 35 I I --P.A.M. FILTER I l I I I K35 I I 3/ I ewm a II I/ I r I I l 23 32' 36' I l I l RAM gFlLTER I l I I l I L M i l-'E 3535 J l 1 I REFERENCE I 22 DETECTOR L h J I55 lOKHz TRIANGULAR To o cfiimJim SEQUENCE \T IOK HZ SQUARE GENERATOR 3,751,987 Aug. 14, 1973 PAIENIED3.751.987

sum 01 or 11 STORE V \y v DEFLECTION AMPLIFIER M VERTICAL MULTIPLEXSTORE u v sIn2 5! 57 I [i d- W 53 SEQUENCE CRT L GEN.

uvcos I \47 V 1 50 I DEFLECTION I AMPLIFIER I A) HORIZONTAL 40 I44 [48MULTIPLEX 36H x200 STORE AMP lg INVENTOR BRIAN EDWARD WHITMORE BY :22:506*- 6: M

ATTORNEY PATENIEB m I 4.915

sum .aaur 11 INTERFACE A, A t B, B

WAVE FORMS TO ANALOGUE SECTION FIG.4

COUNTER GATING CCTS' 68 INVENTOR BRIAN EDWARD WHITMORE ATTORNEYPAIENIEI] Am; 14 ms SHEET 0ROF11 .EEPDO INVENTOR BRIAN EDWARD WHITMOREBY 63" G M AT TORNE Y PAIENIEII I 3.751.987

sIIEEI-IIBIIIII' PULSE WIDTH IOK H 3 MODULATED WAVEFORM TRIANGULARWAVEFORM F BUFFER G AMPLIFIER REF. SIGNAL o-, I(-I) (E ORE) 80 H INPUTSIGNAL 9 L -25 (CONTAINING THE AMPPULl| |5DE OUT-OF-BALANCE MODULATORCOMPONENT) 27 WPULSES wITII I AMPLITUDE a WIDTH 8 33\ FILTER MODULATION.

i DC-OUTPUT PWM sIGNAL OF AMPLITUDE -v TO 83/0 +V INPUT sIGNAL IICONTAINING TITF N OUT-OF-BALANCE COMPONENT) 25' D OUTPUT FIG. 9 v

INVENTOR BRIAN EDWARD WHITMORE QTQQMA ATTORNEY PAIENIEW 3.751.987

SHLEI 07 0F 11 IOK Hz F TRIANGULAIR I FIG. IOa

H WM I FIG [Ob G(E,E')

90 I80 270 3 0 Us I H [LLJLUL U U I WAVEFORM 4 4 FIG. 10c

V 7 7 \sF QPOSAOSUET y j {2 Q6 J FIG. lOd WITH VR & y I g V HAsE M R w 5E g E1 Q E INVENTOR BRIAN EDWARD WHITMORE r G M ATTORNEY PATENTED3.751.987

sum as or 11 c REFERENCE SIGNAL (MEAN VALUE IN PERIOD In) D L INPUTSIGNALS o \3-fI=r|-r2 TO THE I so THAT T=2(hr2) COMPARATOR in=4hMULTIPLIER 0 L OUTPUT 13 a FIG. lIb

STORAGE (SAMPLE-HOLD) CCT MPLE F'RQM OUTPUT MULTIPLIER l 37 86 AMPLIFIERWITH INPUT IMPEDANCE ABOUT IOOOMJL GAN GED TO OTHER STAGES INVENTORBRIAN EDWARD WHITMORE QAEQEWI ATTORNEY PATENTED M975 3. 751 .987

sum 09UF11 OPTIONAL 3RD INPUT FOR AUTOM ATIC BALANCING 49 UV Sin 9! OR UV sin 9 uv sin MULT'PLEX i DEFLECTION AMP U2V sin 11 AC 5! INPUT fSEQUENCE GENERATOR J'U'L AC Y INPUT 53 UV cos u v cos g' DEFLECTION MFIG. I3

UV cos (6 0R U Vcos Q2 7 INPUT FIG. I4 UV sm 9} INPUT L U V sin a! 2 2 EAC INPUT 9! i '89 I AUX. S /sz INVENTOR BRIAN EDWARD WHITMORE P QQQMATTORNEY PAIENIEU 3,751.98?

sum 10 0F 11 VECTOR DlsP I W M FIG. I5

CALIBRA N GRATICU VECTOR DISPLAY 16 CIRCLE TO DISTINGUISH BETWEEN THEVECTORS INVENTOR BRIAN EDWARD WHITMORE ATTORNEY PAIENTED 1 W5 3.751.987

sum '11 0F 11 SEQUENCE GENERATOR lo3\ 52 (/02 r ('3 INPUT 2 sea To 7DECIMAL 8 DECODER 9 I00 K-IOI 96"9I,, 99"

S PH A SE lOK Hz s IFT A.c OUTPUTS TO TRIANGULAR MULTIPLEXING UNIT INPUTFIG. I7

FIG. I r 1 8 INVENTOR l .IMS

BRIAN EDWARD WHITMORE AT TORNE Y BACKGROUND OF THE INVENTION The presentinvention relates to an electronic circuit arrangement especially forautomatically controlling a dynamic balancing machine. Morespecifically, the present circuit arrangement provides a cathode raytube display of one or more control signals in the manner of a planposition indicator.

Prior art high precision dynamic balancing machines compriseelectromagnetic transducers mounted to the bearings on which a workpieceis supported, as well as a reference generator coupled to the workpiece.The signals provided by the electromagnetic transducers containinformation which is proportional to the out of balance forces existingat each bearing. This unbalance information usually must be recoveredfrom a high noise level. Conventionally, such recovery is accomplishedby a phase sensitive rectifier method or by means of a watt meter.

In the phase sensitive rectifier method, the signal is demodulated bythe signal supplied by the reference generator and output voltages areproduced proportional to the out of balance force. This prior art methodhas the disadvantage that harmonic signal components can causeconsiderable errors.

In the other prior art method which employs an electrodynamic or anelectrodynamic-optical watt meter, the reference voltages and theunbalance representing signal are supplied to the coils of a watt meterto provide a polar display, for example in response to a two dimensionalreflection of a light spot proportional to the magnitude and phase ofthe unbalance. In this method employing 21 watt meter, it is necessaryto provide storage means. Besides, although the watt meter issubstantially not sensitive to harmonic signal components, the outputinformation is available only as a deflection of the light spot or as avery low torque needle reflection.

OBJECTS OF THE INVENTION In view of the foregoing it is the aim of theinvention to achieve the following objects, singly or in combination:

to overcome the outlined drawbacks of the prior art;

to provide an electronic circuit arrangement which will combine twosignals in such a manner that the resulting signal comprises theinformation content of both combined signals whereby the resultingsignal may be used, for example for display and/or control purposes;

to combine a reference information containing signal with a quantityinformation containing signal in such a manner that the resultingcombined signal may be displayed on the screen of a cathode ray tube;

to display a multi-information representing signal on the screen of acathode ray tube in a polar coordinate system in the manner of a planposition indicator;

to provide an electronic circuit arrangement for the display of aresulting combined signal on the screen of a cathode ray tube which isso calibrated that the length of the light display represents the amountof an unbalance while the angular position of the light display relativeto a polar coordinate system represents the location of the unbalance ona rotating workpiece relative to a reference location on said workpiece;

to provide a circuit arrangement for converting a digital signal, forexample a reference signal, into an approximation of a sinusoidalanalogue signal;

to provide an electronic multiplier circuit arrangement which willcombine a reference signal and a value representing signal to produce anoutput signal suitable for further use such as the control of anautomatic unbalance correcting machine;

' to provide an electronic circuit arrangement for displaying on thescreen of a cathode ray tube at least two separate signals each of whichrepresents the information content of two separate initial signalswhereby the displayed signals must be distinguishable from each other asto which initial signals are combined in the particular displayedsignal;

to provide an electronic multiplier circuit which provides an outputsignal the amplitude of which is independent of frequency although theamplitudes of the signals fed into the multiplier circuit are frequencydependent;

to provide an electronic circuit arrangement for combining twoinformation representing signals whereby noise components and harmoniccomponents of the signals to be combined must not cause an error in theresulting combinedsignal and such components as such must not cause anoutput signal;

to provide an electronic circuit arrangement for combining twoinformation containing signals and displaying a resulting signal whichdisplay will provide a threefold information;

to provide, especially in connection with automatic balancing machines,a signal display which indicates as the result of the combination of twoinformation containing signals, the size of a required correction mass,the radius from the center line or rotational axis of a workpiece aswell as the angle relative to a zero rotational orientation,'at whichsaid correction mass is to be applied to the workpiece for balancing it;

to provide an electronic circuit arrangement which produces an outputsignal, preferably a displayed output signal, representing a pluralityof information components, from at least two input signals individuallyrepresenting said information components; and

to provide an electronic multiplier circuit which will produce an outputsignal, preferably a d.c. output signal, only when the signals appliedto the multiplier input terminals have the same frequency.

SUMMARY OF THE INVENTION in response to the common frequency componentsof the reference signals and of the signals produced by said transducermeans whereby the output signal is proportional to the product of thetransducer produced signals times the reference signals times the cosineof the angle between these signals. The output signal is displayed on acathode ray tube, preferably in the manner of a plan position indicator.Further, the output signal may be used for controlling an automaticbalancing operation.

It will be appreciated that the transducer means respond to theunbalance of the workpiece and that the reference signal means detect azero rotational orientation of the workpiece whereby the unbalancecausing condition in the workpiece may be located by an angle relativeto such zero rotational orientation. Said electronic multiplier circuitproduces an output voltage only when the signal components at its inputhave the same frequency. The magnitude of the dc. output voltage at theoutput of the multiplier circuit is proportional to the product of thepeak values of the input components having the same frequency times thecosine of the phase difference between the signal components.

BRIEF FIGURE DESCRIPTION In order that the invention may be clearlyunderstood, it will now be described, by way of example, with referenceto the accompanying drawings, wherein:

FIG. 1 is a schematic side view ofa bearing supported workpiece to bebalanced and showing the transducers for producing unbalance signals aswell as digital reference pulses;

FIGS. 2 and 3 are to be taken together since they represent an overallblock diagram of the electronic circuit arrangement according to thepresent invention;

FIG. 4 shows a block diagram of the digital input section of a referencesignal generator which receives said digital reference pulses at itsinput;

FIG. 5 is a circuit diagram of a sub-section of the analogue outputsection of said reference signal generator;

FIGS. 6 and 7 illustrate two sets of signal wave-forms which appear inthe analogue section of the reference signal generator whereby thewave-forms of FIG. 6 appear in the sub-section which produces ananalogue reference signal which is a sine-wave approximation of thereference pulses, whereas the wave-forms of FIG. 7 appear in thesub-section which produces an analogue reference signal which is acosine-wave approximation of the reference pulses, only one sub-sectionis shown since the sub-sections are identical to each other;

FIGS. 8 and 9 show circuit details of the multiplier network showngenerally in FIG. 1, wherein the analogue reference signals and theanalogue unbalance representing signals are multiplied to producesignals suitable for further evaluation, control and/or display;

FIGS. 10a to We illustrate wave-forms which appear in the circuits ofthe multiplier stage;

FIG. lla illustrates a triangular wave-form as applied to one of theplurality of inputs of the multiplier network for producing a pulsewidth modulated waveform shown in FIG. 100;

FIG. llb shows the wave-form at the multiplier output terminals;

FIG. 12 illustrates a circuit diagram of the storage means shown inblock form in FIG. 3;

FIG. 13 is a more detailed block diagram of the multiplex and sequencecircuits of FIG. 3;

FIG. 14 shows a circuit diagram of one of the multiplex circuits of FIG.3, these multiplex circuits being identical to each other;

FIGS. 15 and 16 illustrate the vector display on a cathode fay tubesubstantially in the manner of a plan position indicator;

FIG. 17 is a more detailed block diagram of the sequence generator alsoshown generally in FIGS. 3 and 13; and

FIG. 18 is a circuit diagram of 21 I0 kHz oscillator which generates thesquare wave and triangular waveforms as used in the block diagrams ofFIGS. 2 and 3.

DESCRIPTION OF EXAMPLE EMBODIMENTS Overall Circuit Diagram Thecooperation of the various circuit components will now be described withreference to FIGS. 1, 2, and 3. A workpiece 10 is supported forrotation, for example in bearings 11 and 12. Well known transducer means13 and 14 are located closely adjacent to said bearings in order toascertain unbalance conditions in the workpiece and to produce signalcomponents representing said unbalance condition. The transducers may,for example be of the electromagnetic type, wherein the displacement ofan input actuator by the distance x in the time 1 produces an electricalsignal proportional to dx/dt. When the displacement of the actuator inthe transducer 13 or 14 is due to an out-ofbalance force acting on theworkpiece, the displacement takes the form of U sin wt wherein U is thepeak displacement of the actuator or its largest excursion and w is theangular velocity of the workpiece expressed in rad/sec. (w 211- x f,wherein f is the frequency The respective electrical output signal ofthe transducer 13 or 14 will then be proportional to Uw cos wt, theamplitude Uw of which is proportional to the angular velocity of theworkpiece.

The transducer 13 is arranged on the left hand side or plane of theworkpiece l0 and will thus be referred to as producing a left handunbalance signal component. Respective considerations apply to thetransducer 14 arranged on the right hand side or plane of the workpiece10. Thus, the output terminals 13' and 13" of the left hand transducer13 are connected to left hand plane setting means 13" whereas the righthand transducer 14 is connected with its output terminals.

14' and 14" to a respective right hand plane setting means 14".

FIG. 1 further illustrates means for detecting or producing a referencesignal which defines a zero rotational orientation of the workpiece. Forexample, such means may comprise a light source 15, a reflector 16attached to the surface of the workpiece l0, and a photocell 17 havingan output terminal 17' and being arranged to receive a light beamreflected by the reflector 16. The output 17' of the photocell 17 isconnected to a photocell amplifier 18 shown in FIG. 2. A contrastingmark, for example in the form of said reflector, will change the lightintensity reaching the photocell once during each revolution of theworkpiece. The change in light level from low to high intensity isemployed as a reference point to define said zero rotationalorientation, for example by producing a positive pulse at the output ofthe amplifier 18 during the high intensity period.

In an alternative embodiment also shown in FIG. 1, the detector forproducing a reference signal may comprise an electromagnetic transducer19 which senses a projection 20 on the workpiece whereby a change in themagnetic flux path of the transducer 19 is produced which in turn istransformed in a respective output pulse.

Referring now to FIG. 2, the output of the photocell amplifier I8 isconnected to the input of a reference signal generator 21 which will bedescribed in more detail with reference to FIGS. 4 and 5.

The reference signal generator 21 is connected with its output terminalsto reference signal input means of an electronic multiplier circuit 22.The reference signal input terminals of the multiplier 22 are designatedby the letters E and E. The same letters are used to designate thewave-forms which are supplied to these input terminals and which areshown in FIGS. 6 and 7 as will be described in more detail below.Similarly, the unbalance representing signal components are supplied toinput terminals H of the multiplier 22 and the respective wave-form isshown in FIG. 10b. The multiplier 22 has a further input F and therespective wave form is shown in FIG. 10a.

The multiplier 22 comprises pulse width modulators 23 and 24 connectedto said reference signal inputs E and B respectively. The pulse widthmodulators 23 and 24 have further inputs connected to said multiplierinput F to which is supplied a triangular wave-form of predeterminedfrequency, for example 10 kHz. In the shown embodiment, the multipliercomprises four pulse amplitude modulator stages in order to accommodatea left hand unbalance representing signal component and a right handunbalance representing signal component. However, if only one unbalancerepresenting signal component were to be used, the multiplier wouldcomprise two pulse amplitude modulators. The pulse amplitude modulator25 is connected with one of its inputs through a left hand signalamplifier 26 to the output of the plane setting means 13". The otherinput of the pulse amplitude modulator 25 is connected through a signalinverter 27 to the same amplifier 26.

The pulse amplitude modulator 28 is arranged in the same manner as thepulse amplitude modulator 25 except that one of its inputs is connectedthrough a right hand signal amplifier 29 to the output of the right handplane setting means 14" while its other input terminal is connected to asignal inverter 30 which in turn is connected to said amplifier 29.

The pulse amplitude modulator 31 is connected with its input terminalsin parallel to the input tenninals of the pulse amplitude modulator 25.Similarly, the pulse amplitude modulator 32 is connected with its inputterminals in parallel to the input terminals of the pulse amplitudemodulator 28.

The pulse amplitude modulators have further inputs connected to thepulse width modulators which supply the reference signal component.Thus, the pulse amplitude modulators 25 and 28 are connected to thepulse width modulator 24 and the pulse amplitude modulators 31 and 32are connected to the pulse width modulator 23.

Depending on whether the reference signal compo nent and the unbalancesignal component are in phase with each other or out of phase with eachother by 90, the wave-forms J or K shown in FIGS. 10d and 102 willappear at the outputs 25, 28 31 and 32 of the respective pulse amplitudemodulators.

The output stages of the multiplier 22 comprise filters 33, 34, and 36.The outputs 33', 34', 35' and 36 constitute the output terminals of themultiplier circuit.

Referring now to FIG. 3 there are shown circuit means for ascertainingthe resulting signal produced in the multiplier circuit 22. These signalascertaining circuit means comprise high gain amplifiers 37 to 40 havinginput terminals 33", 34", 35" and 36" connected to respective outputterminals of the multiplier 22. The outputs of the high gain amplifiersare connected to sample-hold switch means 41, 42, 43 and 44. Theseswitch means are ganged to each other and may be operated by any wellknown means suitable for this purpose.

The sample-hold switch means are connected to respective signal storingcircuits 45, 46, 47 and 48. One pair of signal storing means 45, 46 areconnected with their outputs to respective input terminals of a firstmultiplex circuit 49. The other pair of signal storing circuits 47, 48are connected with their outputs to respective inputs of a furthermultiplex circuit 50.

The multiplex circuits 49 and 50 have control input terminals connectedto a sequence generator 51 which in turn is connected with its two inputterminals 52 and 53 to output terminals of a fixed frequency generator54 shown in FIG. 2. The fixed frequency generator 54 produces atriangular wave-form at its output 55 and a square wave-form at itsoutput 56. The output 55 is connected to the input F of the multiplier22 and to the input 52 of the sequence generator 51. The output 56 isconnected to the input 53 of the sequence generator. The sequencegenerator 51 will be described below in more detail with reference toFIG. 17. The fixed frequency generator 54, for example a 10 kHzgenerator, will be described in more detail with reference to FIG. 118.

The multiplex circuit 49 is connected with its output to a verticaldeflection amplifier 56' connected to the respective plates of a cathoderay tube 57. The multiplex circuit 50 is connected with its output to ahorizontal deflection amplifier 58 which in turn is connected to therespective horizontal deflection plates of said cathode ray tube 57.

The overall function of the just described circuit block diagram willbecome apparant in connection with the following more detaileddescription of the structural and functional content of the severalcircuit blocks shown in FIGS. 2 and 3.

REFERENCE SIGNAL GENERATOR Reference is now made to FIGS. 4 and 5 takenin conjunction with the wave-forms diagrams of FIGS. 6 and 7. Thereference generator 21 shown generally in block form in FIG. 2, has adigital input section shown in FIG. 4 and analogue sub-sections shown inFIG. 5. Incidentally, in the course of the following description, itwill be assumed that a signal can pass through a circuit member when therespective circuit member is considered to be open.

Referring now to FIG. 4, the input section of the reference generator 21comprises an input terminal 21' which is connected to the output of thephotocell amplifier 18. The digital input section of FIG. 4 comprises aclock pulse generator 59 connected with its output to a dividing circuit60 which in turn is connected with its output to a counting input 61' ofa first counter 61 which has a reset input 61" connected through delaymeans such as a delay line 62 to the input terminal 21 The output of thefirst counter 61 is connected to coincidence input means 63' of a signalstorage 63. The coincidence input means 63' are also connected to theinput terminal 21' through a conductor 63". The output of the signalstorage means 63 is connected to the input 64 of a comparator 64 whichhas a further input 64" which in turn is connected to a second counter65. The second counter has a counting input 65 directly connected to theoutput of the clock pulse generator 59. A reset input 65" of the secondcounter 65 is connected through logic circuit means 66 such as anOR"-gate to the input terminal 21' as well as to the output of thecomparator 64. The output of the comparator 64 is further connected tothe counting input 67' of a third counter 67. The counter 67 has a resetinput 67" connected to the input terminal 21'. The output of the thirdcounter 67 is connected to the input 68 of gating circuit means 68 whichin turn are connected to the input 69' of so called interface circuit 69for providing the required wave-forms for the analogue output section ofthe reference generator. Such waveforms A, A, B, B are shown in FIGS. 6and 7.

Referring now to FIG. 5, the analogue output stage of the referencegenerator 21 comprises two subsections 70 and 71. The content ofsub-section 71 is the same as that of sub-section 70. Therefore,sub-section 71 is merely shown in block form and the description ofsub-section 70 will be sufficient for a full disclosure.

The sub-section 70 comprises input terminals A and B to which aresupplied the respective wave-forms shown in FIG. 6. The input terminalsare connected through parallel resistors R1 and R2 to the input of asumming amplifier 72 shunted by a resistor R3. The output of theamplifier 72 is connected through a resistor R4 to the input of a signalinverter 73 which is shunted by a further resistor R4. The output of theinverter 73 is connected through switching means 74 and a resistor R tothe input of an integrating circuit 75 at the output of which wave-formE, or E in the case of sub-section 71 appears. 3

The series connection of resistor R4, inverter 73, and switching means74 are shunted by further switching or gating means 76. The integratingcircuit 75 is shunted by a parallel connection of a capacitor 77 andthird switching or gating means 78. The gating means 74, 76, and 78 may,for instance, be field effect transistors connected with their controlinputs 74', 76' and 78 to control wave-forms supplied by the output ofthe interface circuit 69.

The operation of the reference generator 21 will now be described. Theinput pulses appearing at the input terminal 21 (FIG. 4) have a periodtp as shown at the top of FIG. 6. The reference signal generatorproduces two output wave-forms E and E, both of which are straight lineapproximations of sinusoidal wave-forms having the period tp, onewave-form is a sine wave and the other is a cosine wave. The period tpcorresponds to the duration of one revolution of the workpiece l0 and itis equal to the period of the out-of-balance force acting on theworkpiece. The peak amplitudes V of the two output wave-forms E and Eare equal to each other and both wave-forms are proportional to theperiod tp. Under the assumption that the wave-forms are consideredsinusoidal as is shown in FIG. b with the wave-form G which representsthe reference signal VR, the latter may be expressed VR proportional toV/w sin wt and WW cos wr where w 2 'rrf 21r/lp.

Referring to the digital section of the reference generator shown inFIG. 4, the reference period tp is divided into twelve equal portions,that is the reference cycle is divided into 30' sections. It has beenfound that this results in a sufficiently precise sine and cosineapproximation. However, if desired closer approximations may be achievedby providing for smaller subdividsions. In any event, the wave-formsgenerated according to these portions are applied to the analoguesection of FIG. 5. The subdivision by twelve produces twelve straightline portions which constitute the sine and cosine wave-forms E and Eshown in FIGS. 6 and 7.

The digital section of the reference generator shown in FIG. 4 receivesat its input terminal 21 from the photocell amplifier 18 a series ofpulses having the period tp whereby the second counter 65 and the thirdcounter 67 are reset to zero. Further, the value in the first counter 61is transferred into the signal storing memory 63 whereupon, after ashort delay in the delay line 62, the first counter 61 is also reset tozero. During the period tp the first counter 61 receives clock pulsesfrom the clock pulse generator 59 through the divideby-twelve circuit60. The value accumulated in the first counter 61 at the end of theperiod tp is signified by a further input pulse which transfers suchvalue into the memory 63 and the counter 61 is reset as before.Accordingly, the value held in the memory 63 is proportional to theperiod tp. The second counter 65 receives at its counting input 65' theclock pulses directly from the clock generator 59 and the accumulationin the second counter 65 continues until the count is equal to the valueheld in the memory 63. This equality is detected by the comparator 64which in response to said equality generates a pulse for resetting thesecond counter 65 to zero and for changing the value in the thirdcounter 67 by one digit. Counter 67 is adapted to register twelvepositions. The value or count in the second counter 65 again progressesat the rate of the clock pulses until equality is again detected wherebycounter 65 is again reset to zero and the value in the third counter 67is further changed by one digit.

Due to the divide-by-twelve circuit 60, the pulse rate applied to thesecond counter 65 which receives the clock pulses directly is 12 timesthe pulse rate applied to the first counter 61. Accordingly, the thirdcounter 67 progresses by eleven digits during the period tp.

At the time when the next input pulse is received at the input terminal21, the comparator 64 should have detected equality for the l2th timeduring the period and thus the comparator should generate the pulsewhich would reset the second counter 65 and change the content of thethird counter 67 by one digit, whereby the counter 67 is in fact resetto its original value of zero. However, if, for example, due to digitingerrors or due to a change in the time interval between successiveperiods, equality between the value in the memory 63 and the value inthe second counter 65 has not been reached or has been reached prior tothe arrival of the next input pulse at the input terminal 21', then theinput pulse will reset the counter 65 as well as the counter 67 to zero.This feature of the invention insures that the sine and cosinewave-forms produced in the analogue section shown in FIG. 5 start a newcycle each time when an input pulse is received.

The pulses appearing at the output of the third twelve position counter67 are applied to the input 68 of the gating circuits 68. The gatingcircuits gate the signals so as to provide input signal wave-formsrequired by the analogue section of FIG. 5 whereby each signal at agating circuit output assumes a or I level according to the count incounter 67. These binary output levels 0" or l form a twelve digitwave-form as the count of the counter 67 progresses through its twelvepositions whereby the resulting output wave-fonns are repeated for eachcycle of the counter 67.

The digital input section of FIG. 4 is connected to the inputs of theanalogue output section of FIG. by so called interface circuit stages 69which convert the digital voltage levels to corresponding levelsrequired in the analogue section. As mentioned above, the sub-section7-1 comprises the same circuit arrangement as shown for sub-section 70.Therefore, only the operation of the sub-section 70 will be described.The wave-forms applied to subsection 70 are shown in FIG. 6 and thewave-forms applied to sub-section 71 are shown in FIG. 7. Accordingly,it will be noted that sub-section'70 produces a sine approximationwhereas sub-section 71 produces a cosine approximation of the referencepulses produced by the photocell.

The wave-form C (or C) appearing at the respective point C each time atthe output of the summing amplifier 72 is dependent on the inputcombination namely the wave-forms A and B and upon the ratio of R1 andR2 which are chosen to satisfy the ratio of 1:2.7314 as nearly aspossible, thus if it is assumed that the signal or wave-form A appliedto input A produced a voltage at the output of the amplifier 72 of 3.66V, the signal applied to input B would produce a voltage at point C of1.34 V. If the signals were applied simultaneously to both inputs A andB, this would produce a voltage of 5 volts at point C;

The wave-form at the output of the inverter is the inverse of thewave-form at point C. Therefore, the waveform at the output of theinverter 73 is not shown in FIG. 6 and 7.

The switching means 74 and 76 are, for example, field effect transistorswhich act as gates and which receive their control input signals fromthe interface stages 69. These field effect transistors 74 and 76 arecontrolled so that one gate is open when the other gate is closed. Thus,the signals at the output of the amplifier 72 and at the output of theamplifier 73 are gated to produce the wave-form D appearing at the pointD shown in FIG. 5.-

The wave-form D is supplied to the integrator 95 to produce the straightline approximation of the sine wave E. The break points at 30, 60 and 90are 0.5 V, 0.866 V, and l V respectively and thus equal to the valuesgiven by the sine of these angles.

The field effect transistor 78 which shunts the integrator 75 acts as agate which is closed during most of the reference period tp, but whichis opened for a short time duration when the sine wave should have azero value that is at 0 and at l80 and so forth. This features assuresthat each new cycle starts with a zero phase shift even though a slighterror might have occured in the reference period, for example due to thedigitisaapproximation.

' The sub-section 71 functions substantially as described above withregard to sub-section 70. However, in sub-section 71 the gatingswitching means corresponding to the switching means 74 and 76 areopened at and 270 when the cosine wave-form should have a zero value.

ELECTRONIC MULTIPLIER CIRCUIT The wave-forms E and E are supplied to therespective inputs of the multiplier circuit 22 the function of whichwill now be described. The present multiplier circuit produces a d. c.output voltage only when the frequencies of the input wave-forms are thesame. The signal component or components which represent theout-of-balance information received from the transducer 13 and/or 14 isapplied to the inputs H of the multiplier circuit 22. These signals alsohave a period tp which is equal to the period of one revolutionof theworkpiece just as the period of the reference signal which is applied tothe inputs E and E of the multiplier. The respective wave-forms G and Hare shown in FIG. 10b whereby the wave-form G is an idealizedrepresentation of the approximation wave-forms E and E. The referencesignal VR having a peak value V/wl is represented by the wave-form G andthe unbalance information representing signal US having a peak value Uwis shown by wave-form H in FIG. 10b. If the phase difference between thetwo input signals is 1 degrees and if it is assumed that the referencesignal is a sine wave then the output of the multiplier 22 isproportional to the mean value of Uw sin (w,t Q) V/w sin w t wherein w 2rrf 21r/tp With the above assumptions for the peak amplitude values ofthe unbalance signal US and the reference signal VR, the mean value ofthe multiplier output is pro portional to UV cos l If the cosineapproximation is applied and if it is assumed that it is an ideal cosinewave-form the multiplier output is proportional to UV sin l It is animportant advantage of the invention that the d. c. output of themultiplier 22 is independent of frequency although the amplitudes ofboth input signals are frequency dependent. Noise components atfrequencies other than the frequency of the reference signal andharmonic components of the unbalance signal which may be superimposed onthe unbalance signal will thus not result in an output signal at theoutput of the multiplier. Thus, the invention has overcome the initiallyoutlined drawbacks of the prior art. It is unlikely that a noisecomponent at the reference frequency will have a sufficient amplitude toproduce a significant error since the noise components are associatedwith the bearings supporting the workpiece and are of high frequencynature.

An example embodiment of the present multiplier circuit is shown in FIG.8. The pulse width modulators 23 or 24 are embodied by a comparatorcircuit 79 one input of which is connected to the triangular wave-formoutput 55 of the oscillator 54 so that the wave-form F shown in FIG. ais applied to said one input of the comparator circuit 79. The otherinput of the comparator circuit 79 receives the reference wave-form E orE. The output of the comparator circuit 79 produces a pulse widthmodulated wave-form I shown in FIG. 10c. This wave-form is supplied to abuffer amplifier 80 at the output of which the wave-form I is inverted.The buffer amplifier output is connected to a pulse amplitude modulator,for example 25 as also shown in FIG. 2. The two inputs of the pulseamplitude modulator 25 are connected to receive the unbalanceinformation representing signal and its inverted form as described withreference to FIG. 2. Basically, the multiplication process involves thecontrolling of the height and width of a voltage pulse by the two inputsignals so that the area of the pulse represents the product of theinput signals. Applying the so controlled pulse to a filter, such as 33,results in a d. c. voltage output the amplitude of which represents thejust mentioned area of the pulse.

The multiplier circuit 22 operates as follows, when the wave-forms F, G,and H are applied to the respective inputs of the multiplier circuitstage shown in FIG. 8. For the operation to be described it is assumedthat the reference signal VR has a peak value which is always less thanthe peak value of the triangular waveform. It is further assumed thatthe frequency of the triangular wave-form is greater than the referencesignal frequency by an order of magnitude. With these assumptions orconditions, the comparator 79 will produce the pulse width modulatedwave-form I as mentioned above, please see FIG. 10c. The width of thepulses in the wave-form I depends on the amplitude of the referencesignal because the amplitude of the triangular wave-form is greater thanthe amplitude of the reference signal. The buffer amplifier 80 providessufficient amplification to increase the amplitude of each pulse inwave-form I so that the increased amplitude approaches the total supplyvoltage used in the pulse amplitude modulator 25.

An example embodiment ofa pulse amplitude modulator, such as 25, isshown in FIG. 9. The pulse amplitude modulator comprises two gatingswitch means, for example field effect transistors 81 and 82. If thegating field effect transistor 8] acts as the open gate, thesignal-"component to be multiplied is the wave-form H. However, if thegating transistor 82 acts as the open gate, the signal component to bemultiplied is the inverse of the wave-form H.

The gating operation of the field effect transistors 81 and 82 iscontrolled by the pulse width modulated signal at the control input 83which has an amplitude of V to +V as indicated in FIG. 9 so that theoutput signal at the terminal 25 is an amplitude modulated form of thepulse width modulated signal.

If the input signal which represents the unbalance information isconsidered to be sinusoidal and if there is a 90 phase difierencebetween the unbalance signal and the reference signal, then theamplitude and width modulated pulses appearing at the output 25 have theshape J shown in FIG. 10d. Referring to FIG. 10d, it will be seenapproximately that the wave-fonn J includes an area above the zero linewhich is equal to the area included below the zero line so that the meanvalue is zero. The filter 33 is employed to remove the a. c. componentspresent at the output terminal 25' and thus to produce the mean outputvalue. Accordingly, the mean output of the wave-form J is approximatelyzero which is in agreement with the equation for the multiplier outputgiven above which output is proportional to UV cosCl because in thiscase I is and cos is zero.

On the other hand, if the multiplier input signal represented bywave-form H and representing the unbalance information is of equalamplitude and in phase to the reference signal, the output of themultiplier would be a wave-form K as shown in FIG. 10e whereby again theassumption is made that both wave-forms are sinusoidal. In this case,the area above the zero line and enclosed by the wave-form K is greaterthan the respective area below the zero line so that the mean outputvalue would be positive. Referring specifically to FIG. l0e it will benoted that the wave-form K has a maximum area above the zero line and aminimum area below the zero line so that its mean value is the maximumpositive value. This again agrees with the above equation according towhich the multiplier output is proportional to UV cos I where D is zerodegrees so that cos? 1. And the output is a maximum proportional to UV.

Assuming that the peak amplitude of the triangular wave-form F appliedto the respective input of the comparator 79 is c and assuming that itsperiod is t, and assuming further for the purpose of simplifying thecalculations that during the period t the reference signal is a. c.signal having the amplitude b while the unbalance representing signal isa d. c. signal having the amplitude a, then the following calculationscan be made, whereby it is further assumed that the comparator 79controls the pulse amplitude modulator 25 in such a manner that themultiplier output signal is at amplitude a during the time T, that thetriangular waveform amplitude c is greater than b during the time T, andthat during the time 1,, T when the triangular wave-form amplitude isless than b the multiplier output signal is at the amplitude of -a. Withthese assumptions in mind reference is now made to FIGS. 11a and 11b.FIG. 11 a shows the time T= 2(1 t,) where t, t,,/4 and t is the time atwhich the rising triangular wave-form amplitude equals b. t;, is thetime at which the falling triangular wave-form amplitude equals b. Thetriangular wave-form has an initial slope of ct/t so that at time t ct/t b; t, b/c 1,. Thus T= 2 (t, b/c X t,) t,,/2 (lb/c) The multiplieroutput signal is shown in FIG. llb. Its mean values is Thus themultiplier output is proportional to the product of the input signals aand b if c is kept constant. Assuming further that a' and b represent amean value of the unbalance input signal US and of the reference inputsignal VR respectively during the time interval t, and that r, is madevery much smaller than t, then a and b approximate over the period t, toU sin (wt D) and V sin wt respectively, whereby I represents the phasedifference between the unbalance signal and the reference signal andwherein w 2 1rf= 21r/t,,.

Applying the above conditions, the mean value of the multiplier outputmay be calculated as follows:

1 'ng dt lffi (Usin (wt+- Vsinwt) (it 5 C l 0 C V l p (sin wt cos I sinwt cos wt sin I )dt Cl 0 =UV/2ct [t cos IJ sin2wt cos q l2w cos2wt sinD/Zw I, mean output value of multiplier =UV/2c cos (I).

In practice it is not necessary to restrict the input signals to thosehaving a period I, very much greater than the period I of the triangularwave-form F since the multiplier output signal is capable of respondingto changes in a and b during the period 1,, as may be seen from FIG. 10.The restriction t,, very much larger than t, in the above calculationsfor sinusoidal inputs resulted from the condition that signals a and bwere to be constant during the period t,,.

Since the peak amplitude of the triangular wave-form is constant itfollows that the mean output of the multiplier circuit is proportionalto UV cos (I).

DISPLAY MEANS For the majority of balancing purposes it is necessary todisplay the radius and reference angle at which the correction mass mustbe applied for properly balancing the workpiece. The radius hereinvolved extends from the center line or axis of rotation of theworkpiece and the reference angle defines a zero rotational orientationof the workpiece. These two quantities, namely the required correctionmass and the reference angle could be displayed on separate meters.However, a more versatile approach is achieved by displaying thesequantities in polar form on a cathode ray tube as disclosed by thepresent invention.

According to the invention a polar form of display is achieved bymultiplying the signal derived from the transducer in one multiplier bythe reference signal approximating the sine wave and in a secondmultiplier by the reference signal approximating the cosine waveform. Asmentioned, the outputs from these multipliers will be proportional to UVc 1 and UV sind If the multiplier output signal which is proportional toUV sinGl is applied preferably with suitable amplification, to thevertical deflection plates of the cathode ray tube and if the signalproportional to UV cos 1 is applied to the horizontal deflection platesof the cathode ray tube, preferably also after suitable amplification,the length of the vector y shown in FIG. 15 is proportional to UV.Referring further to FIG. 15, the phase angle 0 of the vector y is givenas tan 0 UV sin I /UV cos P so that 0 (I the phase angle between theunbalance component and the reference mark on the workpiece.

Since the magnitude of the vector y as displayed is proportional to UVand since the reference component V is constant as explained above inconnection with the description of the reference generator, it followsthat the magnitude of the vector display is proportional to U whichrepresents the peak value of the workpiece displacement from its centerline. Further, this displacement is proportional to the unbalance couplenamely an out-of-balance mass times the radius at which theout-of-balance mass is considered to act. Accordingly, it is possible tocalibrate the display, for example by means of a calibration graticuleshown in FIG. 16. The calibration is performed by placing a known mass mat a radius r on the workpiece which for the calibration is a balancedrotor having said radius r,. If now the rotor is rotated therespectively displayed vector is a measure for the unbalance caused bythe known mass m,, whereby the entire apparatus is calibrated withregard to this known mass m,. If thereafter an unknown mass m 2 isapplied at the radius r but in the same plane the display will change,for example by an amount y. The following formula applies:

m,r,/x m r ly From this formular m is ascertained as follows:

Usually the calibration test is performed with the radius rcorresponding to the radius at which the unbalance compensating massmust be applied so that r r Accordingly, m may be expressed as follows:

By superimposing the above mentioned graticule on the display a m,/xbecomes mass per division of the display. As a result, the requiredcompensating mass becomes equal to the magnitude of the vector displayresulting from the unbalance times the factor mass per division obtainedfrom the calibartion test. It is shown above that after the justdescribed initial calibration procedure the magnitude of the vectordisplay times a scale determined during the calibration represents themass required for balancing the workpiece. Thus, after the initialcalibration the mass to be applied and the angle at which it is to beapplied are directly represented by the magnitude and the phaserespectively of the vector display as shown in FIGS. 15 and 16. This isan important advantage of the invention over the prior art.

In those instances where the balancing machine comprises twotransducers, one for the left hand (LH) and for the right hand (RH)support of the workpiece it is necessary that the two resulting displayscan be readily distinguished from each other. In this instance, twobalancing planes are selected on the workpiece to which the appropriateunbalance readings can be applied. Means for the plane setting are wellknown in the art in connection with balancing machines and will ensurethat each of two vector displays represents only the correction to beapplied to the respective plane.

According to the invention, a circle is superimposed at the end of oneof the vectors in order to distinguish the two vectors from each other.This is shown in FIG. 16.

In order to accommodate two transducers, the multiplier 22 shown in FIG.2 is provided with the additional pulse amplitude modulators 28 and 32.The pulse width modulator sections are the same. Accordingly, twocomponents are generated which are proportional to U V cos I z and U Vsin I 2 resulting from the second transducer 14.

A multiplex sequence generator circuit is added to the display circuitshown in FIG. 3. The sequence generator is shown in more detail in FIG.17. The sequence generator controls the application of the signalcomponents to the cathode ray tube so as to give the form of displayshown in FIG. 16.

Each multiplier output feeds into a storage and sample-hold circuitshown in FIG. 12. This circuit comprises as its input a relatively highgain amplifier, for example 37 connected with its input 33" to therespective output 33' of the multiplier 22. The output of the high gainamplifier 37 is connected through a variable resistance 84 to therespective sample-hold switch, for example 41. The sample-hold switch isconnected to the input of a further amplifier 84 having a high inputimpedance of about 1,000 M9 and it is also grounded through a capacitor86. The amplifier 37 provides the amplification required to bring thesignal levels available at the multiplier output to the levels requiredfor display on the cathode ray tube. Providing the amplifiers 37, 38, 39and 40 simplifies the storage, multiplex, and sequence circuits.

The variable resistor 84 and the capacitor 86 provide an adjustablefiltering action and operate in conjunction with the respectivemultiplier filter, for example 33. After a balancing operation, theswitch 41 providing the sample and hold operation is opened and thecharge on the capacitor 86 is stored or maintained for a time longenough to correct the unbalance. For this purpose, the input impedanceof the amplifier 85 has the above mentioned high value. The outputimpedance of the amplifier 85 is relatively low, approximately l ohmsand suitable for connection to other equipment including automaticbalancing instrumentation not shown.

The multiplex and sequence circuit is shown in FIG. 13. The multiplexunit comprises two identical sections 49 and 50. Therefore, it will besufficient to describe one of these sections with reference to FIG. 14.FIG. 14 shows a multiplex circuit section comprising input terminals 87,88, and 89 formed by switching means such as controllable field effecttransistors 90, 91, and 92 having control inputs 90', 91', and 92'.These control inputs of the field effect transistors are connected torespective outputs of the sequence generator shown in FIG. 17 and to bedescribed below. The transistors act as gates. When the gate is open thesignal can pass through the gates. The transistors 90 and 91 are openedand closed alternatively to first apply the two signal components, onefor vertical deflection and the other for horizontal deflection,relating to one transducer to the deflection circuits and then to applyafter a short time interval the two components relating to the secondtransducer also to the deflection cicruits. After another time interval,the first set of signals is re-applied to the deflection circuits and soforth.

The multiplex circuit further comprises an output circuit including aseries connection of a resistor 93, a capacitor 94 and a furtherresistor 95. This series connection is connected in parallel to afurther gating transistor 96 having a control input 96. An end of thejust described series and parallel connection is connected to the inputswitching gates and the other end is grounded as seen in FIG. 14. Anoutput terminal 97 connected to the respective deflection circuits isprovided at the junction between the resistor 93 and the capacitor 94.An a. 0. input 98 is connected through a further controllableswitch suchas a field effect transistor 99 to the junction between the capacitor 94and the resistor 95. The transistor 99 has a control input 99' alsoconnected to the respective output of the sequence generator, (FIG. 17).

The capacitor 94 and the resistor means 93, 95 cause the deflectioncircuit voltage to rise exponentially from zero to the input signalamplitude. If the same capacitor resistor values are used in bothsections 49 and 50 of the multiplex circuit, the beam of the cathode raytube is deflected linearly from its central position on the screen tothe position given by the input signal amplitudes representing theunbalance information. The time constant resulting from the resistors 93and 95 and the capacitor 94 corresponds to the capacity times the sum ofthese resistors.

The cathode ray tube beam is linearly returned to its central positionby removing the input signal through appropriately switching eithertransistor or 91 and by making the transistor 96 conductive to dischargethe capacitor 94 through the resistors 93 and which results in anexponential decrease of the deflection voltage. Thus, the display on thescreen of the cathode ray tube is provided in the form of a straightline of uniform brilliance originating at the center of the polarcoordinate system and the length of which is determined by the inputsignal levels. The same sequence of steps is applied with regard to thenext set of input signals produced by the second transducer 14. However,now the switch 99 is made conductive at the time when the deflectionvoltage will be or is very near to the input voltage level. When thetransistor 99 conducts a sinusoidal voltage having a 90 phase differencerelative to the voltage applied to the vertical and horizontal sections,is applied through the capacitor 94 to the deflection circuits whereby acircle is superimposed at the end of the display representing the secondvector. In this manner the two vectors are distinguishable from eachother. Further inputs, as may be required for indicating the depth of adrilling operation can be employed if the sequence operation is modifiedby the inclusion of further field effect transistors which would beconnected in parallel to the transistors 90 and 91. One such transistor92 is shown in FIG. 14. In this case, the sequence generator wouldprovide a further control output to be applied to the control input 92'.

The sequence generator 51 is shown in more detail in FIG. 17. The input53 of the sequence generator 51 is connected to the triangular waveoutput 55 of the fixed frequency oscillator 54. The sequence generatorcomprises, connected to its input 53, an integrating circuit 100 and aphase shifting circuit 101 which provide at their respective outputs thea. c. sine and cosine wave-forms supplied to the multiplex circuits 49and 50.

The input 52 of the sequence generator is connected to the output 56 ofthe fixed frequency oscillator 54 to supply the square wave-form to adivide-by-four circuit 102 whereby the square wave-form of, for example10 kHz is reduced to a frequency of 2.5 kHz. The divideby-four circuit102 comprises two cascaded binary counters and is connected with itsoutput to a binary coded digit or decimal counter 103 which providesfour outputs connected to a binary coded digit to decimal decoder 104having outputs o and l to 9. These outputs are interconnected so as toprovide the terminals 90",9l",96" and 99" connected to the respectivein-

